
As electronic devices become more sophisticated, the demand for semiconductor technology that can deliver greater performance and capacity at lower cost continues to increase. These trends have fueled major advancements in semiconductor technology, with 2D NAND transitioning to 3D NAND over the last decade. The 3D transition has also begun in logic, with FinFET technology giving way to gate-all-around (GAA) transistors and complementary field-effect transistor (CFET) architecture offering attractive benefits. Many are also expecting DRAM to follow in the future. However, scaling semiconductors in the “3D era” is immensely difficult. Chipmakers contend with rising levels of complexity at every new node and are challenged to increase transistor density while reducing power consumption.
Continued advancement in fabrication methods and technologies will be essential to enable and further scale the next-generation of GAA transistors, DRAM architectures and 3D NAND devices that today contain over 200 layers. To sustainably create chips with nano scale-level precision and the right cost structure, wafer fabrication equipment (WFE) makers like Lam Research will need to push the boundaries of plasma physics, materials engineering and data science to deliver the equipment solutions needed. Harnessing the power of data is proving to be a game-changer in delivering these capabilities into production. We are collecting richer data from our equipment and using more advanced data science techniques to convert that into repeatable processing of millions of wafers. As the industry tackles the challenges of the 3D era, here are five potential trends to watch. Multi-function process chambers will bring etch and dep even closer together for high-volume production As films become more complex and nuanced, and requirements increase for both vertical and lateral fill and removal, chip manufacturing processes must evolve to meet a range of requirements in economically viable ways. A promising avenue is the performance of multiple functions in a single process chamber. This could include integrating different deposition or etch techniques to handle the demands of 3D structures, or even the integration of both deposition and etch capabilities, with an eye toward better coverage of 3D topography and in-situ repair processes. This approach may accelerate reliable film creation in the most challenging high-volume situations. More advanced logic chips will need more advanced interconnect metals Tungsten and tungsten oxides have already begun to displace damascene copper in some logic interconnects. As scaling in the 3D era continues, wafer fabrication technologies are pushing the boundaries of traditionally used metals to achieve less resistance and minimize power consumption and signal loss. Alternative metals such as Molybdenum are also being explored, particularly for backend applications. The integration of chiplets will enable greater scaling to extend Moore's lawContinued collaboration, innovation, and new breakthroughs that take fresh approaches and leverage abundant data may hold the keys to powering progress and more sustainable manufacturing to deliver leading-edge technology.


